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Intel and IBM give Moore’s Law a boost

2007-01-28 20:14:46 发表于生活工作 本文链接: Intel and IBM give Moore’s Law a boost

intelIntel和IBM分别宣布他们已经在晶体管的设计方便取得重大的突破,声称这项技术通过减少电子的泄漏数量从而可以改进亚微米工艺技术,将摩尔定律延长十年。

摩尔定律指出,芯片中的晶体管和电阻器的数量每两年会翻番。为了保持这样的创新,晶体管不得不越来越小。然而,利用目前的材料,晶体管的缩小已经接近极限,由于不断增加的能耗和发热的问题,使设计已经接近原子级别的水平(下面是原文,偶是随便翻翻哈)

这里有intel以前的文章 Intel总裁称摩尔定律2010年将失效

Intel and IBM have separately made claims of breakthroughs in transistor design that should lead to improved design in sub-micron process technology by reducing the amount of electrical leakage, and extend Moore’s Law into the next decade

According to Moore’s Law, the number of transistors on a chip roughly doubles every two years and to maintain this pace of innovation, transistors have had to continue to shrink to ever-smaller sizes. However, using current materials, the ability to shrink transistors is reaching fundamental limits because of increased power and heat issues that develop as feature sizes reach atomic levels.

Intel stated that it is will use two new materials to build the insulating walls and switching gates of its 45nm transistors. For its 45nm production, Intel will use a new material with a property called high-k for the transistor gate dielectric, and a new combination of metal materials for the transistor gate electrode. Intel Co-Founder Gordon Moore noted that the implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s.

Silicon dioxide has been used to make the transistor gate dielectric for more than 40 years because of its manufacturability and ability to deliver continued transistor performance improvements as it has been made ever thinner. For example, Intel has been able to shrink the silicon dioxide gate dielectric to as little as 1.2nm thick – equal to five atomic layers – on its 65nm process technology.

But the continued shrinking has led to increased current leakage through the gate dielectric, resulting in wasted electric current and unnecessary heat. Transistor gate leakage associated with the ever-thinning silicon dioxide gate dielectric is recognized by the industry as one of the most formidable technical challenges facing Moore’s Law, Intel pointed out.

To solve this critical issue, Intel replaced the silicon dioxide with a thicker hafnium-based high-k material in the gate dielectric, reducing leakage by more than 10 times compared to the silicon dioxide used for more than four decades.

Because the high-k gate dielectric is not compatible with today’s silicon gate electrode, the second part of Intel’s 45nm transistor material recipe is the development of new metal gate materials. Intel declined to name the specific metals it will use, but the company will use a combination of different metal materials for the transistor gate electrodes.

Intel claims that the combination of the high-k gate dielectric with the metal gate for its 45nm process technology provides more than a 20% increase in drive current, or higher transistor performance. Conversely it reduces source-drain leakage by more than five times, thus improving the energy efficiency of the transistor, the company stated.

Intel believes it has extended its lead of more than a year over the rest of the semiconductor industry with the first working 45nm processors of its next-generation 45nm family of products – codenamed Penryn. The company said it has five early-version products up and running – the first of fifteen 45nm processor products planned and it remains on track for 45nm production in the second half of this year.

However, IBM also announced that it has made a breakthrough in high-k metal gate development. Working with AMD, Sony and Toshiba, IBM said it has already inserted the technology into its semiconductor manufacturing line in East Fishkill, NY and it will also apply the technology into 45nm production starting in 2008.

from:http://www.nowpublic.com/intel_and_ibm_give_moores_law_a_boost

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